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GreatFET One

Connect Python tools to digital buses, GPIO and custom USB experiments.

Build & code

Bring along
Host software, USB cable, test leads and any required neighbor board.
Keep in mind
Expansion boards and enclosure are sold separately.
Source checked · Sep 16, 2026
GreatFET One
Image creditMaker product image · Great Scott Gadgets

(02) Blueprint

Build it yourself

Open hardware

GreatFET One's full KiCad schematic/PCB and an acrylic-case SVG are published under BSD-3-Clause; a community pinout site documents the header.

Research notes

Verified repo (BSD-3-Clause, 98 stars) and file tree via `gh api`; confirmed LPC4330FBD144 by grepping raw azalea.sch content for the part number. azalea.kicad_pcb/azalea.sch note: repo also has an azalea.kicad_pro but no kicad_sch, i.e. schematic is Eagle-format .sch, PCB layout is KiCad.

Every link checked 2026-09-27.

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Specifications

Board & interfaces

8
Design
Azalea / GreatFET One; LPC4330 MCU and 2 MB flash
Expansion
J1/J2: 80 pins; J7 bonus row: 20 pins
Host USB
USB0 high-speed connection to the computer
Target USB
USB1 full-speed port with host/device power switching
Digital tools
GPIO, SPI, I²C, UART, JTAG and logic capture
Analog
ADC/DAC access through the Python API
Controls
Four LEDs, DFU and reset buttons
Hardware debug
J5 Cortex JTAG/SWD header footprint is unpopulated

Electrical setup

5
I/O voltage
Expansion signals use 3.3 V except pins explicitly noted otherwise
Neighbor power
Onboard 3.3 V regulator can supply some neighbor power
Pin mapping
Use the Azalea header tables or interactive pinout for each function
ADC/DAC pin
Default analog interface is J2 pin 5; DAC is 10-bit
Required connections
Connect the host to USB0; use leads appropriate to target pins

Software & package

9
Host runtime
Python 3.9 or later, per current getting-started guide
Install
Python package: greatfet; Linux access rules documented
Check connection
greatfet info reports detected board and firmware
Update pairing
Upgrade host tools, then use the documented firmware autoflash step
Logic capture example
Documented four-channel 2 MSPS capture to a Sigrok file; not a maximum rating
API discovery
greatfet info -A lists APIs provided by installed firmware
Included
USB cable, ESD bag and neighbor-separation tool
Separate accessories
Neighbor boards and enclosure are sold separately
Recovery
ROM USB bootloader supports firmware loading without an external programmer
What still needs checking
  • Not every expansion pin is a general-purpose digital signal. Check the pin table before connecting a target.
  • Maximum neighbor current, complete ADC performance, dimensions and weight were not established here.
  • Software APIs and example rates are firmware-dependent. No target wiring, capture or Facedancer workflow was tested.
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