Airspy
Airspy R2 Monitor VHF and UHF signals with a USB SDR receiver.
Radio Software-defined radio
Radio equipment needs certification where you live (FCC, CE, UKCA, ISED, Anatel). Some devices are uncertified or restricted in Brazil. Buyers are responsible for their local law.
Bring along Compatible host software and an SMA-connected receive antenna.
Keep in mind HF reception needs an external converter; this is a receiver.
Source checked · Sep 16, 2026
Image credit Maker image · R2 circuit board · Airspy
Overview Blueprint Specifications 24 Resources 5
(02) Blueprint
What’s published
Open firmwareUSB/DSP firmware and host driver/software are open source (GPL-2.0); the RF/PCB hardware design itself is not published anywhere.
Source 2 git clone https://github.com/airspy/airspyone_firmware.git
Research notes airspy.com product and quickstart pages describe firmware/host tools as open source but make no mention of published schematics/PCB files; airspyone_firmware repo (GPL-2.0, verified via gh api) is USB-side MCU firmware only, no hardware directory. R820T2 has no public datasheet from Rafael Micro (fabless RF vendor, NDA-only).
Every link checked 2026-09-27.
Hand this device to your agent. Everything on this page, as clean Markdown and JSON: specs, shops, prices, design files, parts.
Made the Airspy R2? Put the badge on your README; it links here, with every shop that sells it.
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Receiver and signal path 9 Native coverage 24–1700 MHz receive; HF needs an optional SpyVerter. Tuner R820T2 or R860 low-IF front end. ADC 12-bit, 20 MS/s; maker figures: 10.4 ENOB, 70 dB SNR, 95 dB SFDR. I/Q output 10 MS/s; 10 MHz view, up to 9 MHz alias/image-free. Reduced-rate mode 2.5 MS/s is experimental; use 10 MS/s plus decimation for dependable narrowband workflows. Noise and linearity Maker figures: 3.5 dB NF at 42–1002 MHz; 35 dBm IIP3. Output format I/Q or real; 16-bit integer or 32-bit float. Processor Cortex-M4F up to 204 MHz with dual M0 cores. Connections and accessories 6 RF connectors SMA input; U.FL RF loopthrough. Bias tee Switchable 4.5 V; 50 mA budget. Clock 0.5 ppm reference, timestamp RTC; external 10–100 MHz reference through MCX. Expansion 16 SGPIO, eight GPIO, two ADC inputs, clock outputs and JTAG; see maker port diagram. HF accessory Connect SpyVerter IF output to R2 RF input; compatible software can power it through the bias tee. Temperature −10 to 40 °C; maintain ventilation. Host and software 9 Suggested computer Third-generation Core i3 2.4 GHz equivalent, 2 GB RAM, high-speed USB 2.0. Host throughput Quickstart warns of dropped samples on slow hosts and discourages hubs at full rate. Platforms Maker lists Windows 10/11, Linux, BSD and macOS; application support varies. Windows setup Normally automatic; maker provides a WinUSB compatibility driver if detection fails. Linux/macOS API Open-source libairspy and host utilities are in airspyone_host. Firmware The Airspy One repository links build and flashing instructions in its wiki. Network receiver SPY Server has Windows and Linux builds; Linux x86-64 build requires AVX2 and FMA. ARM server choice Separate ARM64 and ARMHF downloads; select the host architecture. Plugin boundary The download page cautions that older plugins may fail with SDR# x64.
No matching specification. Try a chip name, connector or feature.
What still needs checking Exact seller package contents and enclosure dimensions are not established by the reviewed product page. The suggested host specification is not a benchmark for every decoder or network workload.
Downloads & docs
From the original makers Build with Airspy R2
Source & revision notes Maker listing checked Sep 15, 2026. Detailed documentation reviewed Sep 16, 2026. Not hands-on tested.
Price is a dated listing; confirm with the maker.
The 24–1700 MHz native range is distinct from coverage offered with the optional SpyVerter. The ADC sampling rate is not the same as the I/Q output rate.
The maker lists host and USB requirements; sustained capture performance depends on the host. The image shows the R2 circuit board, not a complete antenna/host kit.
Detailed documentation reviewed 2026-09-16; this does not refresh price or stock checks or establish hands-on testing.
R2 ADC resolution and output format are separate quantities; decimation does not turn the physical ADC into a 16-bit ADC.
Older quickstart operating-system examples are not current OS support promises.
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